The present invention relates to an integrated voltage control variable gain circuit and a signal transmission circuit using the same.
A voltage control variable gain circuit shown in FIG. 1 in which the gain is varied logarithmically linearly in accordance with changes in the control voltage Vc is known, as shown, for example, in a Japanese magazine titled NIKKEI ELECTRONICS (pp 118-140, Nov. 13, 1978).
In this known voltage control variable gain circuit, the inverting input terminal (-) of an operation amplifier circuit 21 is connected to an input terminal T.sub.IN while the non-inverting terminal (+) is connected to the grounding potential. The output V.sub.1 from the operational amplifier circuit 21 is subjected to a level shift by batteries 22,23. Two voltages thus shifted are applied to emitters of PNP transistors Q.sub.2,Q.sub.4 and emitters of NPN transistors Q.sub.3,Q.sub.1. The bases of the PNP transistor Q.sub.2 and the NPN transistor Q.sub.3 are connected to the grounding potential, while the gain controlling voltage Vc is imposed on the bases of the PNP transistor Q.sub.4 and the NPN transistor Q.sub.1.
Thus, the base-emitter connections of four transistors Q.sub.1 -Q.sub.4 are formed as a bridge circuit network among the circuit connection points T.sub.1,T.sub.2,T.sub.3,T.sub.4. The collector of the transistor Q.sub.1 and the collector of the transistor Q.sub.2 are connected to each other and then to the inverting input terminal (-) of the operational amplifier circuit 21. The collector of the transistor Q.sub.3 and the collector of the transistor Q.sub.4 are connected to each other then to the load resistance R.sub.L.
The relationship between the input current i.sub.in and the output current i.sub.out in this known voltage control variable gain control circuit is given by the following equation, provided that factors of the transistors Q.sub.1 -Q.sub.4 such as V.sub.BE (voltage differential between base and emitter)-I.sub.E (emitter current) characteristic, reverse saturation current I.sub.S, current amplification factor and so forth are equal. EQU i.sub.out /i.sub.in =expq(-V.sub.c)/KT (1)
Therefore, the output current i.sub.out is changed logarithmically linearly in accordance with the change of the control voltage Vc. A study made by the present inventors has clarified that, when this known voltage control variable gain circuit is formed into a semiconductor integrated circuit, the integrated voltage control variable gain circuit exhibits a high distortion factor because of the following reason.
The wave form of the voltages VT.sub.1, VT.sub.3 at the connection points T.sub.1 and T.sub.3 in the circuit of FIG. 1, in response to the output V.sub.1 from the operational amplifier circuit 21, take the same phase, as will be understood from FIGS. 2(a) and 2(b).
On the other hand, in the semiconductor integrated circuit, the NPN and PNP transistors are usually made in the form of vertical type NPN transistor and lateral type PNP transistor in a monolithic semiconductor integrated circuit.
In the formation of the vertical type NPN transistor and lateral type PNP transistor in a semiconductor integrated circuit, as is well known to those skilled in the art from the disclosure of, for example, the specification of U.S. Pat. No. 3,197,710 entitled COMPLEMENTARY TRANSISTOR STRUCTURE, the introduction of P type impurity for forming the P type base region of vertical type NPN transistor and introduction of P type impurity for forming the P type emitter and collector of the lateral type NPN transistor are effected simultaneously. Also, the introduction of N type impurity for forming N.sup.+ type emitter region of vertical type NPN transistor is made simultaneously with the introduction of the N type impurity for the formation of N.sup.+ type base ohmic contact region of the lateral type PNP transistor.
It is, therefore, possible to form a plurality of vertical type NPN transistors and a plurality of lateral type PNP transistors in a single semiconductor integrated circuit by a comparatively simple method. On the other hand, in order to improve various characteristic parameters of the lateral type PNP transistor in the integrated circuit, it is possible to obtain a modified lateral type PNP transistors having an improved emitter injection efficiency by further introducing P type impurity at a high density into the P type emitter region. The PNP transistor of a circuit type grounded at the collector can be formed using a substrate type PNP transistor which makes use of the P type substrate of a bipolar integrated circuit as the collector region.
Therefore, the characteristic parameters of a plurality of NPN transistors formed in the integrated circuit conform at a comparatively high degree of accuracy, and similarly, the characteristic parameters of a plurality of PNP transistors formed in the integrated circuit conform at a comparatively high degree of accuracy. However, the average characteristic parameters of a plurality of NPN transistors and a plurality of PNP transistors do not conform with each other, because of differences in the construction and the manufacturing process.
As the examples of disconformity of the characteristic parameters between the NPN transistors and PNP transistors in the integrated circuit, it is possible to list disconformities of characteristic parameters which are quite important in the bipolar transistors such as base spreading resistance rbb', forward characteristic between base and emitter (V.sub.BE -I.sub.E characteristic, emitter dynamic resistance r.sub.e), common-emitter current amplification factor h.sub.FE, cut-off frequency f.sub.T and so forth.
In the known voltage control variable gain circuit shown in FIG. 1, the conductivity of the PNP transistor Q.sub.4 is increased during the period of positive half cycle of the voltage wave form V.sub.T1 imposed on the circuit connection point T.sub.1 to permit a collector current i.sub.4 to flow through this transistor, whereas the NPN transistor Q.sub.3 increases its conductivity in the period of negative half cycle of the voltage wave form V.sub.T3 imposed on the circuit connection point T.sub.3 to permit the collector current i.sub.3 to flow therethrough.
The following disadvantages are brought about when this known voltage control variable gain circuit is constructed in the form of a semiconductor integrated circuit. Namely, the instantaneous value of the collector current i.sub.4 of the PNP transistor Q.sub.4 becomes smaller than the instantaneous value of the collector current i.sub.3 of the NPN transistor Q.sub.3, due to the discordance of the characteristic parameter between the PNP transistor and the NPN transistors, even if the instantaneous voltages of the positive and negative half cycles of the voltage wave form V.sub.T1 and V.sub.T3 are equal. In consequence, the instantaneous values of the wave form of the output current i.sub.out (=i.sub.3 +i.sub.4) in the positive and negative half cycles are different. The difference of wave form of the output current i.sub.out between the positive and negative half cycles produces, across the load resistance R.sub.L, an output V.sub.out of high distortion factor containing even higher harmonics of frequencies which are even number times as high as the frequency of the fundamental wave, as shown in FIG. 2d.
Namely, a distorted wave shape i having small instantaneous value i (+) of positive half cycle and large instantaneous value i (-) of negative half cycle is obtained. This distorted wave shape i can be developed into Fourier series as follows. It will be seen that this distorted wave shape includes even higher harmonics. ##EQU1##
The present invention has been achieved on the basis of the inventor's study as explained above, in the course of development of an integrated voltage control variable gain circuit capable of providing a low distortion characteristic and applicable to a large variety of uses by a simple modification of the circuit network outside the integrated circuit.
Meanwhile, Japanese Patent Laid-open Publication No. 101859/1973 proposes to prepare two gain control circuits employing diodes, the two circuits being conected to both inputs of a differential amplifier to cancel the influences of higher harmonics, in order to reduce the higher harmonic distortion, particularly the secondary distortion, of the diode in a variable gain circuit making use of diodes.
Further, a technic similar to that proposed by the above-mentioned Japanese Patent Laid-open specification is disclosed in the specification of U.S. Pat. No. 4,155,047 registered on May 15, 1979.